50 lines
949 B
Plaintext
50 lines
949 B
Plaintext
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AGX 98032
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The Appian Renegade series uses a Cirrus Logic VGA chip (CL-GD5402/5420) for
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VGA modes and the AGX98032 for enhanced modes. The VGA can be disabled.
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The older Appian Rendition series uses the TM 340 series (TIGA).
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The AGX 98032 uses the I/O addresses 2B0h-2BFh and a 16K memory mapped area,
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located at B000h, B400h, C000h, C400h, C800h, CC00h, D000h, D400h, D800h,
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DC00h, E000h, E400h, E800h or EC00h
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2B0h D(R/W): Host Ctl
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bit 0
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3-4
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11 To reset the AGX, set this bit, wait ~200ms then clear it
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18
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20
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24-31
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2B4h (R/W):
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2B5h (R/W): ISA Host Ctl
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bit 5
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- 2B8-2BB: DAC regs 0-3 ? 2B4 has RS2/3
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2BAh
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2BBh
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2BEh (R/W):
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Selects the indexed register read or written at 2BFh
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2BEh index 1Dh (R/W):
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M+000h W(R/W):
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bit 9-10
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13
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M+032h (R/W):
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bit 1 Clock chip Clock line
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2 Clock chip Data line
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M+114h W(R/W):
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M+116h W(R/W):
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M+168h W(R/W):
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M+16Ah W(R/W):
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M+524h W(R/W):
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M+712h (R/W):
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bit 0-1
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2-3 |